Tunnel field effect transistor (tfet) with lateral oxidation
AssigneeBoard of Regents, The University of Texas System
InventorsJack C. Lee, Han Zhao
Life of this patent
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Abstract
A vertical-mode tunnel field-effect transistor (TFET) is provided with an oxide region that may be laterally positioned relative to a source region. The oxide region operates to reduce a tunneling effect in a tunnel region underlying a drain region, during an OFF-state of the TFET. The reduction in tunneling effect results in a reduction or elimination of a flow of OFF-state leakage current between the source region and the drain region. The TFET may have components made from group III-V compound materials.
Claims21
A tunnel field-effect transistor (TFET), comprising:
- a source region;
- a drain region;
- a channel region coupled to the drain region;
- a tunnel region having a portion coupled to the channel region;
- and
- an oxide region positioned at least partially under the drain region, the channel region, and the portion of the tunnel region, the oxide region further being positioned laterally relative to the source region.
A method to operate a tunnel field-effect transistor (TFET) having a drain region, a source region, a channel region, and a tunnel region, the method comprising:
- during an OFF-state of the TFET, reducing an OFF-state leakage current flow, in a current flow direction between the source region and the drain region through the tunnel region and the channel region, using an oxide region as an insulator to remove at least some tunneling effect of the tunnel region under the drain region,
- wherein the oxide region is positioned at least partially under the drain region, the channel region, and a portion of the tunnel region, the oxide region further being positioned laterally relative to the source region;
- and
- during an ON-state of the TFET, increasing an ON-state current flow between the source region and the drain region through the channel region and the tunnel region, the increased ON-state current flow being enabled by a decreased thickness of the channel region due to the oxide region being used to reduce the OFF-state current flow.
A process to manufacture a tunnel field-effect transistor (TFET), the process comprising:
- forming a source layer, a tunnel layer, a channel layer, and a drain layer over a substrate;
- etching away a first portion of the drain, channel, tunnel, and source layers down to the substrate;
- and
- laterally oxidizing at least some of the source layer, next to the etched away first portion of the source layer, to form an oxide region, the oxide region underlying the tunnel layer, the channel layer, and the drain layer and being laterally positioned relative to the source layer.
Dependencies are inferred from the claim text.