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US 2013/0093484 A1Published application
Delay circuit and method for driving the same
AssigneeSK hynix Inc.
InventorTae-Kyun KIM
Life of this patent
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Abstract
A delay circuit includes a pulse generation unit configured to generate a pulse signal, which is activated in response to an input signal and has a pulse width corresponding to delay information, and an output unit configured to activate a final output signal in response to a deactivation of the pulse signal.
Claims11
1-25. (canceled)
A delay circuit comprising:
- a pulse generation unit configured to synchronize an input signal with a clock, and generate a pulse signal which is activated in response to the synchronized input signal and has a pulse width corresponding to delay information;
- and
- an output unit configured to activate a final output signal in response to a deactivation of the pulse signal.
A method for driving a delay circuit comprising first and second delay units, which receive an input signal and perform a delay operation, the method comprising:
- transferring the input signal to the first delay unit when the first delay unit is not performing the delay operation while transferring the input signal to the second delay unit when the first delay unit is performing the delay operation;
- outputting a first output signal of the first delay unit by delaying the input signal by a first value corresponding to delay information;
- outputting a second output signal of the second delay unit by delaying the input signal by a second value corresponding to the delay information when the first delay unit is performing the delay operation;
- and
- activating a final output signal when the first output signal of the first delay unit or the second output signal of the second delay unit is activated.
2 more elements
Dependencies are inferred from the claim text.