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US 2013/0093096 A1Published application
Semiconductor device
AssigneeRenesas Electronics Corporation
InventorsMasayuki FURUMIYA, Yasutaka NAKASHIBA, Akira TANABE
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Abstract
A semiconductor device with a transistor region has a first conductor pattern formed within a multilayer interconnect structure positioned under a signal line and above the transistor region. The first conductor pattern is coupled to ground or a power supply and overlaps the transistor region. The signal line overlaps the first conductor pattern.
Claims12
A semiconductor device comprising:
- a transistor formed in a transistor region on a substrate;
- a multilayer interconnect structure formed over the transistor region;
- a first conductor pattern formed in the multilayer interconnect structure to overlap the transistor region, said first conductor pattern being coupled to ground or to a power supply;
- a first dielectric layer formed over the multilayer interconnect structure;
- a signal line formed over the first dielectric layer in a region in which it overlaps the first conductor pattern in plan view, the signal line being part of a transmission line;
- and
- two second conductor patterns formed in the same conductor layer as the signal line and, in a plan view, extending parallel to the signal line with the signal line between them,
- wherein the second conductor patterns are electrically coupled to the first conductor pattern,
- wherein a distance from the signal line to the second conductor patterns is greater than a height form the first conductor pattern to the signal line.
6 more elements
Dependencies are inferred from the claim text.