Dual interlock heatsink assembly for enhanced cavity pbga packages, and method of manufacture

A method, comprising:

• placing a quantity of thermally conductive adhesive in a plurality of through apertures formed in a package substrate;
• placing a first heatsink in physical contact with the quantity of thermally conductive adhesive, thereby, upon curing of the quantity of thermally conductive adhesive, attaching the first heatsink to a first face of the package substrate;
• coupling a semiconductor die to a surface of the first heatsink in a position corresponding to a first cavity extending in the package substrate;
• and
• placing a second heatsink in physical contact with the quantity of thermally conductive adhesive, thereby, upon curing of the quantity of thermally conductive adhesive, attaching the second heatsink to a second face of the package substrate opposite the first heatsink, the semiconductor die being enclosed, within the first cavity, between the first and second heatsinks.

A method, comprising:

• providing a first aperture in a package substrate, extending in the substrate from a first face less than a thickness of the substrate, the first aperture having side walls and a back wall, the back wall lying parallel to the front face of the package substrate;
• providing a second aperture in the package substrate, extending in the substrate from the back wall to a second face of the substrate, the second face lying on a side of the substrate opposite the first face and substantially parallel therewith, the second aperture having lateral dimensions that are less than lateral dimensions of the first aperture;
• providing a plurality of third apertures positioned adjacent to the second aperture and extending in the substrate from the back wall to the second face;
• positioning a plurality of wirebond pads on the back wall of the substrate, each of the plurality of wirebond pads being closer to the second aperture than any of the plurality of third apertures;
• positioning a plurality of ball grid pads on one of the first or second faces of the package substrate;
• and
• forming a plurality of electrical traces on the package substrate, each placing one of the plurality of wire bond pads in electrical contact with a respective one of the plurality of ball grid pads.