Pulse output circuit, display device, and electronic device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHiroyuki MIYAKE, Kei Takahashi
Life of this patent
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Abstract
An object of the present invention is to suppress deterioration in the thin film transistor. A plurality of pulse output circuits each include first to eleventh thin film transistors is formed. The pulse output circuit is operated on the basis of a plurality of clock signals which control each transistor, the previous stage signal input from a pulse output circuit in the previous stage, the next stage signal input from a pulse output circuit in the next stage, and a reset signal. In addition, a microcrystalline semiconductor is used for a semiconductor layer serving as a channel region of each transistor. Therefore, degradation of characteristics of the transistor can be suppressed.
Claims21
A driver circuit comprising:
- a first transistor;
- a second transistor;
- a third transistor;
- a fourth transistor;
- a fifth transistor;
- a sixth transistor;
- a seventh transistor;
- and
- a eighth transistor,
- wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor,
- wherein one of a source and a drain of the third transistor is electrically connected to a gate of the first transistor,
- wherein a gate of the fourth transistor is electrically connected to a gate of the second transistor,
- wherein one of a source and a drain of the fifth transistor is electrically connected to the other of the source and the drain of the third transistor,
- wherein one of a source and a drain of the sixth transistor is electrically connected to the gate of the second transistor,
- wherein one of a source and a drain of the seventh transistor is electrically connected to the gate of the second transistor,
- wherein one of a source and a drain of the eighth transistor is electrically connected to the gate of the second transistor;
- and
- wherein the other of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the sixth transistor.
A display device comprising:
- a pixel portion formed over a substrate;
- and
- a circuit formed over the substrate, the circuit comprising:
- a first transistor;
- a second transistor;
- a third transistor;
- a fourth transistor;
- a fifth transistor;
- a sixth transistor;
- a seventh transistor;
- and
- a eighth transistor,
- wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor,
- wherein one of a source and a drain of the third transistor is electrically connected to a gate of the first transistor,
- wherein a gate of the fourth transistor is electrically connected to a gate of the second transistor,
- wherein one of a source and a drain of the fifth transistor is electrically connected to the other of the source and the drain of the third transistor,
- wherein one of a source and a drain of the sixth transistor is electrically connected to the gate of the second transistor,
- wherein one of a source and a drain of the seventh transistor is electrically connected to the gate of the second transistor,
- wherein one of a source and a drain of the eighth transistor is electrically connected to the gate of the second transistor;
- and
- wherein the other of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the sixth transistor.
Dependencies are inferred from the claim text.