Embedded Transistor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYu-Wei Ting, Kuo-Ching Huang
Life of this patent
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Abstract
An embedded transistor for an electrical device, such as a DRAM memory cell, and a method of manufacture thereof is provided. A trench is formed in a substrate and a gate dielectric and a gate electrode formed in the trench of the substrate. Source/drain regions are formed in the substrate on opposing sides of the trench. In an embodiment, one of the source/drain regions is coupled to a storage node and the other source/drain region is coupled to a bit line. In this embodiment, the gate electrode may be coupled to a word line to form a DRAM memory cell.
Claims20
A method comprising:
- providing a substrate having a first set of trenches and a second set of trenches;
- forming a dielectric material in the first set of t trenches;
- forming a gate dielectric along sidewalls and a bottom of the second set of trenches;
- forming a gate electrode over the gate dielectric in the second set of trenches;
- and
- forming source/drain regions in the substrate on opposing sides of the second set of trenches.
A method comprising:
- providing a substrate;
- forming a plurality of trenches in the substrate;
- filling the plurality of trenches in the substrate with a first dielectric material;
- removing at least a portion of the first dielectric material from selected ones of the plurality of trenches;
- forming a gate dielectric layer along a bottom and sidewalls of the selected ones of the plurality of trenches;
- forming a gate electrode over the gate dielectric layer along the bottom of the selected ones of the plurality of trenches;
- and
- forming source/drain regions along a surface of the substrate adjacent the selected ones of the trenches.
An device comprising:
- a substrate;
- a first recess and a second recess in the substrate, the first recess and the second recess having a first depth;
- a dielectric material in the first recess;
- a gate dielectric along sidewalls and a bottom of the second recess;
- a gate electrode over the gate dielectric, the gate electrode having a top surface below an uppermost surface of the substrate;
- and
- source/drain regions in the substrate on opposing sides of the second recess.
Dependencies are inferred from the claim text.