Mechanical suppression of parasitic plasma in substrate processing chamber

A pedestal system for a semiconductor process, comprising:

• a pedestal platen that supports a substrate, that is made of a non-conducting material and that includes an electrode embedded therein;
• a first surface having a substantially different electrical potential than the electrode;
• N dielectric layers that are arranged between the pedestal platen and the first surface, where N is an integer that is greater than one;
• and
• wherein the N dielectric layers define:
• a first gap between the pedestal platen and the N dielectric layers,
• a second gap between adjacent ones of the N dielectric layers, and
• a third gap between the N dielectric layers and the first surface, and
• wherein N and sizes of the first gap, the second gap and the third gap are selected to prevent parasitic plasma between the first surface and the electrode during the semiconductor process.

A showerhead system for a semiconductor process, comprising:

• a showerhead;
• a first surface having a substantially different electrical potential than the showerhead;
• and
• a dielectric structure that includes a plurality of spaced dielectric layers and that is arranged between the first surface and the showerhead,
• wherein a number of the plurality of spaced dielectric layers and spacing between the plurality of spaced dielectric layers are selected to prevent parasitic plasma between the first surface and the showerhead during the semiconductor process.