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US 2013/0086360 A1Published application
FIFO Load Instruction
AssigneeQUALCOMM Incorporated
InventorsMao Zeng, Lucian Codrescu, Erich James Plondke, Ajay Anant Ingle
Life of this patent
Estimating the term…
Abstract
An instruction identifies a register and a memory location. Upon execution of the instruction by a processor, an item is loaded from the memory location and a shift and insert operation is performed to shift data in the register and to insert the item into the register.
Claims22
An apparatus comprising:
- memory storing an instruction that identifies a register and a memory location, wherein upon execution of the instruction by a processor, an item is loaded from the memory location and a shift and insert operation is performed to shift data in the register and to insert the item into the register.
A method comprising:
- receiving an instruction that identifies a register and a memory location;
- and
- executing the instruction, wherein executing the instruction comprises:
- loading an item from the memory location;
- shifting data in the register;
- and
- inserting the item into the register.
4 more elements
An apparatus comprising:
- means for storing an instruction that identifies a register and a memory location;
- and
- means for executing the instruction, wherein the means for executing the instruction comprises:
- means for loading an item from the memory location;
- means for shifting data in the register;
- and
- means for inserting the item into the register.
4 more elements
A non-transitory computer-readable medium including program code that, when executed by a processor, causes the processor to:
- receive a single instruction that identifies a register and a memory location;
- and
- execute the single instruction, wherein executing the single instruction includes:
- loading the item from the memory location;
- shifting data in the register;
- and
- inserting the item into the register.
4 more elements
Dependencies are inferred from the claim text.