Staggered read operations for multiple operand instructions
AssigneeAdvanced Micro Devices, Inc.
InventorsJeffrey P. Rupley, Dimitri Tan
Life of this patent
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Abstract
A central processing unit includes a register file having a plurality of read ports, a first execution unit having a first plurality of input ports, and logic operable to selectively couple different arrangements of the read ports to the input ports. A method for reading operands from a register file having a plurality of read ports by a first execution unit having a first plurality of input ports includes scheduling an instruction for execution by the first execution unit and selectively coupling a particular arrangement of the read ports to the input ports based on a type of the instruction.
Claims32
A central processing unit, comprising:
- a register file having a plurality of read ports;
- a first execution unit having a first plurality of input ports;
- and
- logic operable to selectively couple different arrangements of the read ports to the input ports.
A computer system, comprising:
- memory operable to store a plurality of instructions;
- and
- a central processing unit, comprising:
- a register file having a plurality of read ports;
- a first execution unit having a first plurality of input ports;
- logic operable to selectively couple different arrangements of the read ports to the input ports;
- and
- a first scheduler operable to receive at least a subset of the instructions, schedule instructions from the subset in the first execution unit, and control the logic to select arrangements for coupling the read ports to the input ports based on a type of the scheduled instruction.
A method for reading operands from a register file having a plurality of read ports by a first execution unit having a first plurality of input ports, comprising:
- scheduling an instruction for execution by the first execution unit;
- and
- selectively coupling a particular arrangement of the read ports to the input ports based on a type of the instruction.
A computer readable storage device encoded with data that, when implemented in a manufacturing facility, adapts the manufacturing facility to create a central processing unit, comprising:
- a register file having a plurality of read ports;
- a first execution unit having a first plurality of input ports;
- and
- logic operable to selectively couple different arrangements of the read ports to the input ports.
Dependencies are inferred from the claim text.