Task Queuing in a Multi-Flow Network Processor Architecture
AssigneeLSI Corporation
InventorsDeepak Mital, William Burroughs, Michael R. Betker, Joseph R. Hasting
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AssigneeLSI Corporation
InventorsDeepak Mital, William Burroughs, Michael R. Betker, Joseph R. Hasting
Estimating the term…
Described embodiments generate tasks corresponding to each packet received by a network processor. A destination processing module receives a task and determines, based on the task size, a queue in which to store the task, and whether the task is larger than space available within a current memory block of the queue. If the task is larger, an address of a next memory block in a memory is determined, and the address is provided to a source processing module of the task. The source processing module writes the task to the memory based on a provided offset address and the address of the next memory block, if provided. If a task is written to more than one memory block, the destination processing module preloads the address of the next memory block to a local memory to process queued tasks without stalling to retrieve the address of the next memory block.
A method of processing a received packet of a network processor, wherein the network processor comprises a plurality of processing modules and at least one shared memory, the method comprising:
A non-transitory machine-readable medium, having encoded thereon program code, wherein, when the program code is executed by a machine, the machine implements a method of processing a received packet of a network processor, wherein the network processor comprises a plurality of processing modules and at least one shared memory, the method comprising:
A network processor having a plurality of processing modules and at least one shared memory, wherein the network processor generates one or more tasks corresponding to each of a plurality of received packets, the network processor comprising:
Dependencies are inferred from the claim text.