Pixel guard lines and multi-gate line configuration

A display apparatus, comprising:

• an array of pixels, each pixel associated with one of a plurality of data lines, each pixel including a plurality of sub-pixels, each sub-pixel associated with a gate line and including a pixel TFT connected to the data line and to the gate line;
• a timing control module configured to generate a control signal, the control signal identifying a sub-pixel to be turned on and a plurality of sub-pixels to be turned off;
• and
• a gate driver configured to selectively apply a voltage to a gate line of the sub-pixel to be turned on based on the control signal,
• wherein a pixel TFT of the sub-pixel to be turned on is electrically connected to the data line, and
• wherein pixel TFTs of the plurality of sub-pixels to be turned off are electrically disconnected from the data line.

A method for displaying an image on a display apparatus having an array of pixels, each pixel associated with one of a plurality of data lines, each pixel including a plurality of sub-pixels, each sub-pixel associated with a gate line and including a pixel TFT connected to the data line and to the gate line, the method comprising:

• generating a control signal, the control signal identifying a sub-pixel to be turned on and a plurality of sub-pixels to be turned off;
• and
• selectively applying a voltage to a gate line of the sub-pixel to be turned on based on the control signal,
• wherein a pixel TFT of the sub-pixel to be turned on is electrically connected to the data line, and
• wherein pixel TFTs of the plurality of sub-pixels to be turned off are electrically disconnected from the data line.