Time error estimating device, error correction device and a/d converter
AssigneeKabushiki Kaisha Toshiba
InventorsTomohiko Sugimoto, Takafumi Yamaji, Junya Matsuno, Masanori Furuta
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Abstract
A time error estimating device for estimating a sampling time error of each of a plurality of sampling circuits when the sampling circuits generates a plurality of sampling output signals by performing sampling at timings shifted from one another has correlators each configured to obtain a correlation value representing a similarity between the sampling output signals, and a weight adder configured to estimate the sampling time error of the sampling circuits, based on a result obtained by adjusting a weight on the correlation value.
Claims20
A time error estimating device for estimating a sampling time error of each of a plurality of sampling circuits when the sampling circuits generates a plurality of sampling output signals by performing sampling at timings shifted from one another, comprising:
- correlators each configured to obtain a correlation value representing a similarity between the sampling output signals;
- and
- a weight adder configured to estimate the sampling time errors of the sampling circuits, based on a result obtained by adjusting a weight on the correlation value.
An error correction device, comprising:
- a plurality of sampling circuits configured to perform sampling of an input signal at timings shifted from one another;
- a first differential value estimator configured to estimate a differential value of the input signal using output signals of the sampling circuits;
- a plurality of first delay units each configured to delay the output signal of the sampling circuit;
- error removers each configured to generate a sampling output signal by removing a sampling time error of the sampling circuit from an output signal of the first delay unit;
- and
- a time error estimating device configured to generate an error signal corresponding to the sampling time error,
- wherein the time error estimating device comprises:
- correlators each configured to obtain a correlation value between the sampling output signals or the output signals of the sampling circuits;
- and
- a weight adder configured to estimate the sampling time error of the sampling circuit, based on a result obtained by adjusting a weight on the correlation value by the differential value of an input signal estimated by the corrected output signal or the output signal of the sampling circuit.
An A/D converter, comprising:
- a single A/D converting unit configured to perform A/D conversion;
- a demultiplexer configured to classify an output signal of the A/D converting unit into a plurality of A/D converted output signals each obtained within a predetermined time range;
- a first differential value estimator configured to estimate a differential value of an input signal using the A/D converted output signals;
- a plurality of first delay units each configured to delay the A/D converted output signals;
- error removers each configured to generate a sampling output signal by removing a sampling time error of the A/D converted output signals from an output signal of the first delay unit;
- and
- a time error estimating device configured to generate an error signal corresponding to the sampling time error,
- wherein the time error estimating device comprises:
- correlators each configured to obtain a correlation value between the sampling output signals or the A/D converted output signals;
- and
- a weight adder configured to estimate the sampling time error of the A/D converted output signals, based on a result obtained by adjusting a weight on the correlation value with a differential value of the A/D converted output signal.
Dependencies are inferred from the claim text.