Systems and methods for discharging bus voltage using semiconductor devices
AssigneeGM Global Technology Operations LLC
InventorsRAY M. RANSOM, DAVID TANG
Life of this patent
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Abstract
Systems, apparatus, and methods are provided for discharging a voltage bus using a transistor. An exemplary gate drive circuit associated with the transistor includes a pulse generation module having an input and an output and a switched capacitance arrangement coupled between the output and a reference voltage node. The pulse generation module is configured to generate a voltage pulse at its output in response to a control signal at the input. In one embodiment, the control signal results in the voltage pulse having a duty cycle that operates the transistor associated with the gate drive circuit in a linear mode when the switched capacitance arrangement is activated.
Claims20
A gate drive circuit comprising:
- a pulse generation module having an input and an output, the pulse generation module being configured to generate a voltage pulse at the output in response to a control signal at the input;
- and
- a switched capacitance arrangement coupled between the output and a reference voltage node.
An electrical system comprising:
- a first voltage rail;
- a second voltage rail;
- a first transistor coupled between the first voltage rail and the second voltage rail;
- gate drive circuitry including:
- a first node coupled to a control terminal of the first transistor;
- a pulse generation module having an output coupled to the first node, the pulse generation module being configured to generate a voltage pulse at the output;
- and
- a switched capacitance arrangement coupled between the first node and a reference voltage node;
- and
- a control module coupled to the gate drive circuitry, wherein the control module is configured to activate the switched capacitance arrangement in response to a discharge condition.
A method for discharging an energy potential between a first node and a second node using a first transistor coupled between the first node and the second node, the method comprising:
- identifying a discharge condition;
- in response to identifying the discharge condition, activating a switched capacitance arrangement coupled between a reference voltage node and a third node, the third node being coupled to a control terminal of the first transistor;
- and
- providing one or more voltage pulses to the third node after activating the switched capacitance arrangement.
Dependencies are inferred from the claim text.