Integrated circuit device, electronic device and method for detecting timing violations within a clock

An electronic device comprising at least one clock monitor, the at least one clock monitor comprising:

• a timer arranged to:
• receive a clock signal;
• generate a first timing signal arranged to toggle between states in response to a trigger edge of the clock signal;
• and
• generate a second timing signal arranged to toggle between states in response to a trigger edge of the clock signal such that a state transition of the second timing signal in response to a trigger edge of the clock signal is delayed by a period T with respect to the trigger edge of the clock signal in response to which that state transition occurs;
• a detector arranged to:
• receive at a first input thereof the first timing signal;
• receive at a second input thereof the second timing signal;
• compare states of the first and second timing signals;
• and
• generate an indication of a timing discrepancy signal based at least partly on the comparison of the first and second timing signals.

A method for detecting timing violations within a clock signal, the method comprising:

• receiving a clock signal;
• generating a first timing signal arranged to toggle between states in response to a trigger edge of the clock signal;
• generating a second timing signal arranged to toggle between states in response to a trigger edge of the clock signal such that a state transition of the second timing signal in response to a trigger edge of the clock signal is delayed by a period T with respect to the trigger edge of the clock signal in response to which that state transition occurs;
• comparing states of the first and second timing signals;
• and
• generating a timing violation signal based at least partly on the comparison of the first and second timing signals.