Integrated circuit including a voltage divider and methods of operating the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYvonne LIN, Wen-Ting CHU
Life of this patent
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Abstract
An integrated circuit includes at least one FLASH memory array and at least one capacitor array disposed over a substrate. The at least one capacitor array includes a plurality of capacitor cell structures. The capacitor cell structures each includes a first capacitor electrode disposed over the substrate. A second capacitor electrode is disposed over the first capacitor electrode. A third capacitor electrode is disposed adjacent to first sidewalls of the first and second capacitor electrodes. A fourth capacitor electrode is disposed adjacent to second sidewalls of the first and second capacitor electrodes.
Claims20
An integrated circuit comprising:
- at least one FLASH memory array disposed over a substrate;
- and
- at least one capacitor array including a plurality of capacitor cell structures disposed over the substrate, the capacitor cell structures each comprising:
- a first capacitor electrode disposed over the substrate;
- a second capacitor electrode disposed over the first capacitor electrode;
- a third capacitor electrode disposed adjacent to first sidewalls of the first and second capacitor electrodes;
- and
- a fourth capacitor electrode disposed adjacent to second sidewalls of the first and second capacitor electrodes.
An integrated circuit comprising:
- at least one FLASH memory array disposed over a substrate, wherein the at least one FLASH memory array comprises a plurality of FLASH memory cells and each of the plurality of FLASH memory cells comprises:
- a floating gate disposed over the substrate;
- a control gate disposed over the floating gate;
- a word line disposed adjacent to first sidewalls of the floating gate and the control gate;
- an erase gate disposed adjacent to second sidewalls of the floating gate and the control gate;
- a first source/drain (S/D) region disposed in the substrate and adjacent to a sidewall of the word line;
- and
- a second S/D region disposed in the substrate and below the erase gate;
- and
- at least one capacitor array including a plurality of capacitor cell structures disposed over the substrate, the capacitor cell structures each comprising:
- a first capacitor electrode disposed over the substrate;
- a second capacitor electrode disposed over the first capacitor electrode;
- a third capacitor electrode disposed adjacent to first sidewalls of the first and second capacitor electrodes;
- a fourth capacitor electrode disposed adjacent to second sidewalls of the first and second capacitor electrodes;
- a fifth capacitor electrode disposed over the substrate and adjacent to the fourth capacitor electrode;
- a sixth capacitor electrode disposed over the fifth capacitor electrode and adjacent to the fourth capacitor electrode;
- and
- a seventh capacitor electrode disposed over the substrate and adjacent to sidewalls of the fifth and sixth capacitor electrodes.
A method of operating a voltage divider, the voltage divider comprising a plurality of capacitor cell structures over a substrate, the capacitor cell structures each comprising a first capacitor electrode disposed over the substrate, a second capacitor electrode disposed over the first capacitor electrode, a third capacitor electrode disposed adjacent to first sidewalls of the first and second capacitor electrodes, a fourth capacitor electrode disposed adjacent to second sidewalls of the first and second capacitor electrodes, a fifth capacitor electrode disposed over the substrate and adjacent to the fourth capacitor electrode, a sixth capacitor electrode disposed over the fifth capacitor electrode and adjacent to the fourth capacitor electrode, and a seventh capacitor electrode disposed over the substrate and adjacent to sidewalls of the fifth and sixth capacitor electrodes, the method comprising:
- applying a first voltage level to at least first one of the first to seventh capacitor electrodes;
- electrically grounding at least second one of the first to seventh capacitor electrodes;
- and
- electrically coupling at least third one of the first to seventh capacitor electrodes to provide a second voltage level on an output node of the voltage divider, wherein the second voltage level is smaller than the first voltage level.
Dependencies are inferred from the claim text.