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US 2013/0076320 A1Published application
Internal capacitor linear regulator with transient dip compensator for internal-switch switching regulator
AssigneeBroadcom Corporation
InventorsHua Beng CHAN, Deyu Chen, Queenie Le
Life of this patent
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Abstract
A switching regulator arrangement utilizes internal capacitors rather than external capacitors for driving output power transistors. Low-dropout linear voltage regulators together with a dip compensation circuit provide an intermediate supply voltage for driving power transistors under circumstances in which a supply voltage is greater than a gate drive voltage of the power transistor, allowing for a more efficient absorption of transient current.
Claims16
An integrated circuit switching regulator, comprising:
- a n-type transistor and a p-type transistor arranged in circuit such that their respective drains are coupled together and provide an output of the switching regulator;
- a first pre-driver configured to provide a first gate voltage to the n-type transistor;
- a second pre-driver configured to provide a second gate voltage to the p-type transistor;
- a first low-dropout regulator (LDO) configured to provide a first DC voltage to the first pre-driver;
- a second LDO configured to provide a second DC voltage to the second pre-driver;
- a first capacitor, internal to the integrated circuit, coupled to a supply-to-ground rail of the first pre-driver;
- a second capacitor, internal to the integrated circuit, coupled to a supply-to-ground rail of the second pre-driver;
- a first dip compensator constructed and arranged to charge the first capacitor to offset a first voltage dip when the n-type transistor is turned on,
- a second dip compensator constructed and arranged to charge the second capacitor to offset a second voltage dip when the p-type transistor is turned on.
6 more elements
A method of providing a regulated voltage output from an unregulated voltage input, comprising:
- generating a switching clock based on at least the unregulated voltage;
- providing first and second gate voltages based on the switching clock;
- driving the respective gates of n-type and p-type transistors with respective first and second gate voltages to provide the regulated voltage output from coupled-together drains of the n-type and p-type transistors;
- correcting a voltage dip of capacitors associated with respective n-type and p-type transistors, by adding a first signal to a first DC voltage when the n-type transistor is turned on and by adding a second signal to a second DC voltage when the p-type transistor is turned on.
1 more element
Dependencies are inferred from the claim text.