Semiconductor device and a method of manufacturing the same
AssigneeRenesas Electronics Corporation
InventorsAkihiko Yoshioka, Shinya Suzuki
Life of this patent
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Abstract
A semiconductor device manufacturing technique which allows reduction of semiconductor chip size. First, a pad and other wires are formed over an insulating film. A surface protective film is formed over the insulating film including the pad and wires, and an opening is made in the surface protective film. The opening lies over the pad and exposes a surface of the pad. A bump electrode is formed over the surface protective film including the opening. Here, the pad is smaller than the bump electrode. Consequently, the wires are arranged just beneath the bump electrode in the same layer as the pad 10. In other words, the wires are arranged in space which becomes available because the pad is small enough.
Claims10
1-22. (canceled)
A semiconductor device comprising:
- (a) a semiconductor substrate of substantially rectangular shape;
- (b) a plurality of semiconductor elements formed over the semiconductor substrate;
- (c) a first wiring formed over the semiconductor elements;
- (d) a first insulating film formed over the semiconductor substrate to cover the semiconductor elements and the first wiring;
- (e) a plurality of pad electrodes formed over the first insulating film;
- (f) a second wiring formed over the first insulating film, the second wiring being formed of a conducting film at a same level as the pad electrodes;
- (g) a second insulating film to cover the first insulating film, the pad electrodes, and the second wiring, the second insulating film having openings at upper sides of the pad electrodes;
- and
- (h) a plurality of bump electrodes of substantially rectangular shape formed over the second insulating film and being electrically connected to the pad electrodes via the openings of the second insulating film,
- wherein the bump electrodes and the pad electrodes are respectively arranged at predetermined intervals in a first direction extending along a long side of the semiconductor substrate,
- wherein each of the bump electrodes is arranged such that each of the long sides of the bump electrodes extends in a second direction along a short side of the semiconductor substrate,
- wherein the second wiring intersects with said long sides of the bump electrodes in a plan view,
- wherein each of the bump electrodes has a first short side and a second short side,
- wherein the first short side of each of the bump electrodes overlaps with each of the pad electrodes in a plan view, and
- wherein the second short side of each of the bump electrodes overlaps with the second wiring in a plan view.
Dependencies are inferred from the claim text.