US 2013/0075897 A1Published application

Semiconductor integrated circuit device for driving display device and manufacturing method thereof

AssigneeRenesas Electronics Corporation

InventorsAtsushi OBUCHI, Kazuhisa HIGUCHI, Kazuo OKADO, Kazuto MITSUI, Shusaku MIYATA

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Abstract

A semiconductor integrated circuit device for driving an LCD, COG chip packaging is performed. To achieve this, an elongate and relatively thick gold bump electrode is formed over an aluminum-based pad having a relatively small area. In a wafer probe test performed after formation of the gold bump electrode, a cantilever type probe needle having gold as a main component and having an almost perpendicularly bent tip portion is used. The diameter of this probe needle in the vicinity of its tip is usually almost the same as the width of the gold bump electrode. This makes it difficult to perform the wafer probe test stably. To counteract this, a plurality of bump electrode rows for outputting a display device drive signal are formed such that the width of inner bump electrodes is made greater than the width of outer bump electrodes.

Claims24

Dependent claims

A semiconductor device, comprising:

a semiconductor substrate of a rectangular shape, the semiconductor substrate having a first long side and a second long side;
a plurality of first pads and a plurality of second pads formed over the semiconductor substrate;
a first insulating film formed over the first pads and the second pads and having a plurality of first openings and a plurality of second openings such that the first openings are formed at upper sides of corresponding ones of the first pads and the second openings are formed at upper sides of corresponding ones of the second pads,
a plurality of first bump electrodes of a rectangular shape formed over the first insulating film and electrically connected to corresponding ones of the first pads via the first openings, respectively, and
a plurality of second bump electrodes of a rectangular shape formed over the first insulating film and electrically connected to corresponding ones of the second pads via the second openings, respectively,
wherein the first bump electrodes and the second bump electrodes are arranged linearly in a first direction which is along the first long side,
wherein the first bump electrodes and the second bump electrodes are disposed closer to the first long side than the second long side in plan view,
wherein the first bump electrodes are disposed between the first long side and the second bump electrodes in plan view,
wherein each of the first bump electrodes and each of the second bump electrodes are configured such that long sides thereof extend in a second direction which is along a first short side of the semiconductor substrate,
wherein a first width of each of the second bump electrodes along the first direction is made wider than a second width of each of the first bump electrodes along the first direction, and
wherein a first length of each of the first pads along the second direction is made wider than a second length of each of the second pads along the second direction.

8 more elements

A semiconductor device, comprising:

a semiconductor substrate of a rectangular shape, the semiconductor substrate having a first long side and a second long side;
a plurality of first pads and a plurality of second pads formed over the semiconductor substrate;
a first insulating film formed over the first pads and the second pads and having a plurality of first openings and a plurality of second opening such that the first openings are formed at upper sides of corresponding ones of the first pads and the second openings are formed at upper sides of corresponding ones of the second pads,
a plurality of first bump electrodes of a rectangular shape formed over the first insulating film and electrically connected to corresponding ones of the first pads via the first openings, respectively, and
a plurality of second bump electrodes of a rectangular shape formed over the first insulating film and electrically connected to corresponding ones of the second pads via the second openings, respectively,
wherein the first bump electrodes and the second bump electrodes are arranged linearly in a first direction which is along the first long side,
wherein the first bump electrodes and the second bump electrodes are disposed closer to the first long side than the second long side in plan view,
wherein the first bump electrodes are disposed between the first long side and the second bump electrodes in plan view,
wherein each of the first bump electrodes and each of the second bump electrodes are configured such that long sides thereof extend in a second direction which is along a first short side of the semiconductor substrate,
wherein a first width of each of the second bump electrodes along the first direction is made wider than a second width of each of the first bump electrodes along the first direction,
wherein a first length of each of the first bump electrodes along the second direction is made wider than a second length of each of the second bump electrodes along the second direction, and
wherein a third length of each of the first pads along the second direction is made wider than a fourth length of each of the second pads along the second direction.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/680,777Filed 19 Nov 2012
Priority: JP 2008-28957012 Nov 2008
Published: 28 Mar 2013
Term ends: Not estimatedThe source records don’t support an estimate.

Classification32 codes

H10W 72/00
Interconnections or connectors in packages
G01R 31/318511
Test of Modular systems, e.g. Wafers, MCM's: wafer Test
G09G 3/006
Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes: electronic inspection or…
H10W 72/20
Interconnections or connectors in packages: bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps