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US 2013/0075863 A1Published application
ESD Protection Apparatus
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJam-Wem Lee, Yi-Feng Chang
Life of this patent
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Abstract
An ESD protection apparatus comprises a substrate, a low voltage p-type well and a low voltage n-type well formed on the substrate. The ESD protection device further comprises a first P+ region formed on the low voltage p-type well and a second P+ region formed on the low voltage n-type well. The first P+ region and the second P+ region are separated by a first isolation region. The breakdown voltage of the ESD protection apparatus is tunable by adjusting the length of the first isolation region.
Claims20
An apparatus comprising:
- a substrate with a first doping density;
- a first low voltage well having a first conductivity type and a second doping density formed in the substrate;
- a second low voltage well having a second conductivity type and the second doping density formed in the substrate;
- a first semiconductor region having the first conductivity type and a third doping density formed on the first low voltage well;
- and
- a second semiconductor region having the first conductivity type and the third doping density formed on the second low voltage, wherein the first semiconductor region and the second semiconductor region are separated by a first isolation region and wherein the second doping density and the third doping density are substantially higher than the first doping density.
3 more elements
A circuit comprising:
- a first PNP transistor comprising
- a first collector formed by a first P+ region, a low voltage p-type well and a substrate;
- a first emitter formed by a second P+ region, wherein the first P+ region and the second P+ region are separated by a first isolation region;
- and
- a first base formed by a low voltage n-type well, wherein the low voltage n-type well is formed between the substrate and the second P+ region;
- a first pad coupled to the first emitter of the first PNP transistor;
- and
- a second pad coupled to the first collector of the first PNP transistor.
5 more elements
A circuit comprising:
- a first NPN transistor comprising
- a first collector formed by a first N+ region, a low voltage n-type well and a substrate;
- a first emitter formed by a second N+ region, wherein the first N+ region and the second N+ region are separated by a first isolation region;
- and
- a first base formed by a low voltage p-type well, wherein the low voltage p-type well is formed between the substrate and the second N+ region;
- a first pad coupled to the first collector of the first NPN transistor;
- and
- a second pad coupled to the first emitter of the first NPN transistor.
5 more elements
Dependencies are inferred from the claim text.