Multi-gate bandgap engineered memory
AssigneeMacronix International Co., Ltd.
InventorsHANG-TING LUE, SZU-YU WANG
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Abstract
Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric structure disposed above the channel region, the tunnel dielectric structure comprising at least one layer having a hole-tunneling barrier height; a charge storage layer disposed above the tunnel dielectric structure; an insulating layer disposed above the charge storage layer; and a gate electrode disposed above the insulating layer are described along with arrays and methods of operation.
Claims14
A semiconductor structure, comprising:
- a semiconductor body having a first dopant type;
- a channel region in the semiconductor body;
- a FN hole-tunneling barrier, a charge storage layer, and a dielectric layer between a plurality of word lines and the corresponding channel region in the semiconductor body;
- a first select line and a second select line beside two sides of the plurality of word lines;
- at least one junction in the semiconductor body being characterized by a second dopant type and adjacent to the first select line;
- and
- in the semiconductor body between the junction and the second select line is junction-free.
A method for manufacturing a semiconductor structure, comprising:
- providing a semiconductor body having a first dopant type and a channel region in the semiconductor body;
- forming a FN hole-tunneling barrier, a charge storage layer, and a dielectric layer between a plurality of word lines and the corresponding channel region in the semiconductor body;
- forming a first select line and a second select line beside two sides of the plurality of word lines;
- forming at least one junction in the semiconductor body being characterized by a second dopant type and adjacent to the first select line;
- and
- blocking implantation of the second dopant type in the semiconductor body between the junction and the second select line so that the channel region is junction-free.
Dependencies are inferred from the claim text.