Silicon carbide semiconductor device

A silicon carbide semiconductor device comprising:

• a silicon carbide layer including a first layer having n type conductivity, a second layer provided on said first layer and having p type conductivity, and a third layer epitaxially formed on said second layer and having n type conductivity, assuming that ND is defined to represent a concentration of a donor type impurity in said silicon carbide layer, NA is defined to represent a concentration of an acceptor type impurity in said silicon carbide layer, and D2 is defined to represent a location in said second layer away from an interface between said second layer and said third layer in a depth direction, D2 in which 1≦NA/ND≦100 is satisfied being within 1 μm therefrom, said silicon carbide layer being provided with a gate trench extending through said third layer and said second layer to reach said first layer;
• a gate insulating film covering a side wall of said gate trench;
• and
• a gate electrode embedded in said gate trench with said gate insulating film interposed therebetween.

A silicon carbide semiconductor device comprising:

• a silicon carbide layer including a first layer having n type conductivity, a second layer epitaxially formed on said first layer and having p type conductivity, and a third layer epitaxially formed on said second layer and having n type conductivity, assuming that ND is defined to represent a concentration of a donor type impurity in said silicon carbide layer, NA is defined to represent a concentration of an acceptor type impurity in said silicon carbide layer, and D1 is defined to represent a location in said first layer away from an interface between said first layer and said second layer in a depth direction, D1 in which 1≦ND/NA≦50 is satisfied being within 1 μm therefrom, assuming that D2 is defined to represent a location in said second layer away from an interface between said second layer and said third layer in the depth direction, D2 in which 1≦NA/ND≦100 is satisfied being within 1 μm therefrom, said silicon carbide layer being provided with a gate trench extending through said third layer and said second layer to reach said first layer;
• a gate insulating film covering a side wall of said gate trench;
• and
• a gate electrode embedded in said gate trench with said gate insulating film interposed therebetween.