Integrated nonvolatile resistive memory elements
AssigneePriva Tran
InventorsBurt Fowler, Glenn Mortland
Life of this patent
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Abstract
A resistive memory apparatus provides resistive memory material between conductive traces on a substrate or in a film stack on a substrate. The resistive memory apparatus may provide a sealed cavity or may utilize material obviating the need for the cavity. Methods and materials utilized to form the resistive memory apparatus are compatible with current microelectronic fabrication techniques. The resistive memory apparatus is nonvolatile or requires no power to maintain a programmed state. The resistive memory device may also be directly integrated with other microelectronic components.
Claims50
A resistive memory apparatus comprising:
- a substrate;
- a first electrode formed in a portion of the substrate, wherein the portion of the substrate is doped to form a first doping type area;
- a resistive memory layer positioned over at least a portion of the first electrode, wherein the resistive memory layer provides a low resistivity state when a first predetermined voltage range is applied, and the resistive memory layer provides a high resistivity state when a second predetermined voltage range is applied;
- a second electrode positioned over at least a portion of the resistive memory layer and first electrode, wherein the second electrode is formed from a conductive layer;
- a first trace coupled to the first electrode;
- and
- a second trace coupled to the second electrode.
A method for forming a resistive memory device, the method comprising:
- doping a portion of a substrate to form a first electrode, wherein the portion of the substrate is doped to a first doping type;
- depositing an first insulator layer on the substrate, wherein the first insulator layer is positioned over at least a portion of the first electrode;
- depositing a conductive layer to form a second electrode positioned over at least a portion of the resistive memory layer;
- creating a second insulator layer on at least the first and second electrodes;
- depositing a first trace, wherein the first trace is coupled to the first electrode;
- depositing a second trace, wherein the second trace is coupled to the second electrode;
- and
- electroforming across the first trace and the second trace to form a resistive memory material in the first insulator layer, wherein the resistive memory material provides a low resistivity state when a first predetermined voltage range is applied, and the resistive memory material provides a high resistivity state when a second predetermined voltage range is applied.
Dependencies are inferred from the claim text.