Method and Apparatus to Reduce Impedance Discontinuity in Packages
AssigneeIBM Corporation
InventorsPaul M. Harvey, Douglas O. Powell, Wolfgang Sauter, Yaping Zhou
Life of this patent
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Abstract
A device and/or apparatus having plated through holes (PTHs) which are coated to reduce impedance discontinuity in electronic packages. PTH vias are imbedded in the core of a printed circuit board comprising a core layer, a plurality of buildup layers, a plurality of micro-vias, and a plurality of traces. Traces electrically interconnect each of the micro-vias to PTH vias, forming an electrically conductive path. PTHs are coated with a magnetic metal material, such as nickel, to increase the internal and external conductance of the PTHs, thereby providing decreased impedance discontinuity of the signals in electronic packages.
Claims10
A device comprising:
- one or more first planar conductive layers;
- one or more second planar conductive layers substantially parallel to the one or more first planar conductive layers;
- a core dielectric disposed between the one or more first planar conductive layers and the one or more second planar conductive layers, said core dielectric having one or more plated through holes (PTH) coated with a layer of magnetic material to provide decreased impedance discontinuity of signals by increasing inductance of the PTH;
- and
- one or more traces electrically connected to the one or more PTH to provide an electrically conductive path to the PTH from the one or more first planar conductive layers and the one or more second planar conductive layers.
Dependencies are inferred from the claim text.