Monolithic Darlington with Intermediate Base Contact
AssigneeDiodes Zetex Semiconductors Limited
InventorDavid Neil Casey
Life of this patent
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Abstract
In one embodiment, a method includes forming a first pad for coupling to a first terminal of a first transistor of a monolithic darlington transistor configuration and forming a second pad for coupling to a first terminal of a second transistor of the monolithic darlington transistor configuration. The method then forms a third pad for coupling to an external component for the monolithic darlington transistor configuration. The third pad is coupled to a second terminal of the first transistor and a second terminal of the second transistor of the monolithic darlington transistor configuration.
Claims17
A method comprising:
- forming a first pad for coupling to a first terminal of a first transistor of a monolithic darlington transistor configuration;
- forming a second pad for coupling to a first terminal of a second transistor of the monolithic darlington transistor configuration;
- and
- forming a third pad for coupling to an external component for the monolithic darlington transistor configuration, the third pad being coupled to a second terminal of the first transistor and a second terminal of the second transistor of the monolithic darlington transistor configuration.
A method comprising:
- forming a first pad for coupling an input node of a first die to a first transistor of a first die;
- forming a second pad for coupling an output node of the first die to a second transistor;
- and
- forming a third pad configured to be coupled to a third transistor of a second die, wherein the third pad couples to an intermediate node between the input node and the output node.
An apparatus comprising:
- a first pad for coupling to a first terminal of a first transistor of a monolithic darlington transistor configuration;
- a second pad for coupling to a first terminal of a second transistor of the monolithic darlington transistor configuration;
- and
- a third pad for coupling to an external component for the monolithic darlington transistor configuration, the third pad being coupled to a second terminal of the first transistor and a second terminal of the second transistor of the monolithic darlington transistor configuration.
Dependencies are inferred from the claim text.