Back to results
US 2012/0281920 A1Published application
Parallel test payload
AssigneeHewlett-Packard Development Company, L.P.
InventorsRobert Alan Ulichney, Steven J. Simske, Matthew D. Gaubatz
Life of this patent
Estimating the term…
Abstract
A parallel test payload includes a bit sequence configured to be segmented into a plurality of sub-sequences having variable bit length carriers. Respective carriers are represented uniformly in each one of the plurality of sub-sequences.
Claims17
A parallel test payload, comprising:
- a bit sequence configured to be segmented into a plurality of sub-sequences having variable bit length carriers;
- and
- respective carriers represented uniformly in each one of the plurality of sub-sequences.
A method for generating a parallel test payload, comprising:
- generating a bit sequence;
- and
- segmenting the bit sequence into a plurality of sub-sequences having variable bit length carriers such that respective carriers are represented uniformly in each one of the plurality of sub-sequences.
A parallel calibration method, comprising:
- generating a parallel test payload;
- embedding data of the parallel test payload onto a plurality of different carrier cells of a comprehensive carrier configuration, thereby generating a digital composite signal;
- converting the digital composite signal to analog form on a data-bearing medium;
- converting the analog signal to a recovered digital signal;
- performing an inverse embedding process to extract recovered data of the parallel test payload from the recovered digital signal;
- and
- generating recovery statistics by comparing the recovered data with the embedded data.
4 more elements
Dependencies are inferred from the claim text.