Configurable integrated tamper dectection circuitry

A method for configuring tamper detection circuitry for a protected memory, the tamper detection circuitry comprising a programmable interconnect comprising a plurality of switches, the programmable interconnect being connected to a first surface layer surrounding the protected memory, the first surface layer comprising a first plurality of conductive sections, and a second surface layer surrounding the protected memory, the second surface layer being located outside of the first surface layer, the second surface layer comprising a second plurality of conductive sections, wherein the first and second plurality of conductive sections are connected to the programmable interconnect by a plurality of conductive traces, the method comprising:

• determining a plurality of possible switch configurations for the programmable interconnect, wherein the plurality of possible switch configurations each correspond to different groupings of the first and second plurality of conductive sections into a plurality of circuits;
• selecting a switch configuration from the plurality of switch configurations;
• and
• committing the selected switch configuration to the switches that comprise the programmable interconnect such that the first and second plurality of conductive sections are grouped into a plurality of circuits corresponding to the selected switch configuration, wherein each of the plurality of circuits has a different respective voltage.

A computer program product comprising a computer readable storage medium containing computer code that, when executed by a computer, implements a method for configuring tamper detection circuitry for a protected memory, the tamper detection circuitry comprising a programmable interconnect comprising a plurality of switches, the programmable interconnect being connected to a plurality of conductive sections by a plurality of conductive traces, wherein the method comprises:

• determining a plurality of possible switch configurations for the programmable interconnect, wherein the plurality of possible switch configurations each correspond to different groupings of the conductive sections into a plurality of circuits;
• selecting a switch configuration from the plurality of switch configurations;
• and
• committing the selected switch configuration to the switches that comprise the programmable interconnect such that the conductive sections are grouped into a plurality of circuits corresponding to the selected switch configuration, wherein each of the plurality of circuits has a different respective voltage.