Device and method for reproducing digital signal and device and method for recording digital signal

A device for reproducing data from a medium recording modulated data having a correcting block configured by attaching an error correcting code to user data, the device comprising:

• a demodulating circuit for performing a demodulating process to data read from the medium;
• a memory for storing data demodulated in the demodulating circuit;
• a correcting circuit for performing an error correcting process to data read from the memory;
• an output circuit for outputting error-corrected data from the memory to an external point;
• a memory controlling circuit for controlling a read and a write of data from and to the memory;
• a first counter to which one increment is added each time a process for one correcting block ends in the demodulating circuit;
• a second counter to which one increment is added each time a process for one correcting block ends in the correcting circuit;
• a comparing circuit for comparing a first parameter of the first counter with a second parameter of the second counter;
• and
• a clock controlling circuit for switching a frequency of a clock supplied to the demodulating circuit, the correcting circuit, the output circuit, and the memory controlling circuit depending on a comparison result in the comparing circuit.

A device for recording to a recording medium modulated data having a correcting block configured by attaching an error correcting code to inputted user data, the device comprising:

• an input circuit for inputting the user data from an external point;
• a memory for storing the data inputted by the input circuit;
• an error-correcting-code generating circuit for generating an error correcting code for data read from the memory;
• a modulating circuit for reading data having a correcting block configured by attaching the error correcting code from the memory to perform a modulating process;
• a memory controlling circuit for controlling a read and write of data from and to the memory;
• a first counter to which one increment is added each time a process for one error-correcting-code block ends in the modulating circuit;
• a second counter to which one increment is added each time an error-correcting-code generating process ends in the error-correcting-code generating circuit;
• a comparing circuit for comparing a first parameter of the first counter and a second parameter of the second counter;
• and
• a clock controlling circuit for controlling to switch a frequency of a clock supplied to the input circuit, the error-correcting-code generating circuit, the modulating circuit, and the memory controlling circuit depending on a comparison result in the comparing circuit.

A device for reproducing data from a medium recording modulated data having a correcting block configured by attaching an error correcting code to user data, the device comprising:

• a demodulating circuit for performing a demodulating process to data read from the medium;
• a memory for storing data demodulated in the demodulating circuit;
• a correcting circuit for performing an error correcting process to data read from the memory;
• a memory controlling circuit for controlling a read and a write of data from and to the memory;
• a first counter to which one increment is added each time a process for one correcting block ends in the demodulating circuit;
• a second counter to which one increment is added each time a process for one correcting block ends in the correcting circuit;
• a comparing circuit for comparing a first parameter of the first counter with a second parameter of the second counter;
• and
• a clock controlling circuit for switching a frequency of a clock supplied to the demodulating circuit, the correcting circuit, and the memory controlling circuit depending on a comparison result in the comparing circuit.

A device for reproducing data from a medium recording modulated data having a correcting block configured by attaching an error correcting code to user data, the device comprising:

• a demodulating circuit for performing a demodulating process to data read from the medium;
• a memory for storing data demodulated in the demodulating circuit;
• a correcting circuit for performing an error correcting process to data read from the memory;
• a memory controlling circuit for controlling a read and a write of data from and to the memory;
• a first counter to which one increment is added depending on a volume of the data demodulated in the demodulating circuit;
• a second counter to which one increment is added depending on a volume of the data error-corrected in the correcting circuit;
• a comparing circuit for comparing a first parameter of the first counter with a second parameter of the second counter;
• and
• a clock controlling circuit for switching a frequency of a clock supplied to the demodulating circuit, the correcting circuit, and the memory controlling circuit depending on a comparison result in the comparing circuit.