Sampling clock selection module of serial data stream

A sampling clock selection module for a serial data stream, the serial data stream comprising a plurality of bit periods, the sampling clock selection module comprising:

• a multi-phase generation circuit, configured to generate a plurality of non-overlapping clock phases derived from a reference clock signal;
• a phase selection circuit, configured to select a sampling clock phase under a calibration mode from the clock phases in response to a phase selection signal;
• a sampling circuit, configured to perform sampling on the bit periods of the serial data stream a plurality of times to generate a plurality of sampled values in response to the sampling clock phase generated by the phase selection circuit;
• a comparison unit, configured to compare the sampled values with data bits of the serial data stream so as to update the phase selection signal and a flag signal respective to the sampling clock phase;
• and
• a logic operation unit, configured to perform a logic operation on a plurality flag signals respective to the sampling clock phases so as to select a sampling clock phase under a normal operation mode from the clock phases.