Semiconductor Device and Method of Controlling the Same
AssigneeRenesas Electronics Corporation
InventorsToshio Yamada, Kazuo Tanaka, Akinobu Watanabe, Shigeru Yamamoto, Yukio Hiraiwa
Life of this patent
Estimating the term…
Loading patent…
AssigneeRenesas Electronics Corporation
InventorsToshio Yamada, Kazuo Tanaka, Akinobu Watanabe, Shigeru Yamamoto, Yukio Hiraiwa
Estimating the term…
A pull-up circuit prevents generation of a leak current if a difference of potentials occurs between a power source voltage of a pull-up circuit (a bus-hold circuit) and an input terminal. A control terminal is provided in the bus-hold circuit. Inputs of the input terminal and the control terminal are input to a NOR gate, and an output of the NOR gate is input to a gate terminal of a first MOSFET that controls coupling between an input terminal and the power source voltage of the bus-hold circuit. A second MOSFET (“control” MOSFET) is provided as a switch that operates by an inverted output of the control terminal. By coupling the first MOSFET and the control MOSFET in series, the coupling between the input terminal and the power source voltage is controlled with a higher precision, thereby preventing generation of a leak current.
A semiconductor device comprising:
Dependencies are inferred from the claim text.