Functional Capping

The method as claimed in claim , comprising

• providing a first wafer which is an SOI wafer;
• patterning and etching the device layer of said SOI wafer down to the insulating stop layer/buried oxide layer to provide a structure comprising a plurality of holes and/or trenches having a well defined depth;
• applying metal in the holes and/or trenches;
• providing a second wafer having electronic and micro-electronic/mechanic device structures provided thereon;
• bonding the first wafer and the second wafer together;
• removing the handle layer of the SOI wafer.

A wafer-level chip-scale hermetic package, comprising, a first wafer and a second wafer;

• a space between the wafers or a cavity formed from the first wafer;
• a contact on the back side of the wafer;
• a contact on the front side of the wafer;
• a via through the wafer connecting the front contact to the back contact;
• wherein the surfaces of the via, i.e. the walls and the bottom is covered with metal;
• bonding material joining the first wafer and the second wafer.

A method of manufacturing a passive functional component in a substrate, said component comprising a functional part extending through the substrate and has an extension in the plane of the substrate, the method comprising the following steps:

• providing an SOI wafer having a component layer, a handle layer and a stop layer between the component layer and the handle layer, as a starting substrate;
• patterning the component layer of the SOI wafer to define the desired components;
• etching trenches down to the stop layer;
• oxidizing the entire wafer whereby a thin insulating layer on the wafer and in all holes and trenches is obtained;
• depositing a seed layer of conductive material to facilitate subsequent metallization;
• masking the entire wafer and patterning to expose only the trenches;
• metallizing to fill the trenches at least partly with a desired metal;
• removing the handle layer.