Thin film transistor array panel and method of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsKyung-Wook KIM, Min-Wook PARK
Life of this patent
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Abstract
A thin film transistor (“TFT”) array panel is provided. The TFT array panel includes an insulation substrate, a gate line formed on the insulation substrate and including a gate electrode, a data line insulated from and intersecting the gate line, and including a source electrode, a drain electrode opposite to the source electrode on the gate line, and a semiconductor formed in a layer between the data line and the gate line, and having a protruding portion extending below the drain electrode, wherein a portion of the semiconductor extending towards the drain electrode, from an area occupied by the data line, is positioned within an occupying area of the gate line including the gate electrode.
Claims16
A thin film transistor array panel comprising:
- an insulation substrate;
- a gate line formed on the insulation substrate and including a gate electrode;
- a data line insulated from and intersecting the gate line, and including a source electrode;
- a drain electrode disposed opposite to the source electrode on the gate line;
- and
- a semiconductor formed in a layer between the data line and the gate line, the semiconductor having a protruding portion extending below the drain electrode,
- wherein a portion of the semiconductor extending towards the drain electrode, from an area occupied by the data line, is disposed within an occupying area of the gate line including the gate electrode.
A thin film transistor array panel comprising:
- an insulation substrate;
- a gate line formed on the insulation substrate and including a gate electrode;
- a gate insulating layer formed on the gate line;
- a semiconductor stripe formed on the gate insulating layer, the semiconductor stripe having a protruding portion;
- a data line formed on the semiconductor stripe and intersecting the gate line, the data line including a source electrode;
- a drain electrode formed on the protruding portion of the semiconductor stripe;
- a passivation layer formed on the data line and the drain electrode and having a contact hole exposing the drain electrode;
- and
- a pixel electrode formed on the passivation layer and connecting to the drain electrode through the contact hole,
- wherein a portion of the semiconductor stripe extending toward the drain electrode, from an area occupied by the data line, is disposed within an occupying area of the gate line including the gate electrode.
A method of manufacturing a thin film transistor array panel, the method including:
- forming a gate line and a gate electrode on an insulation substrate;
- forming a semiconductor layer and a data metal layer on the gate line and gate electrode on the insulation substrate;
- and,
- forming a semiconductor stripe and a protruding portion from the semiconductor layer and a data line, source electrode, and drain electrode from the data metal layer using one mask,
- wherein forming the semiconductor stripe and protruding portion includes forming the protruding portion within an area occupied by the gate line and gate electrode.
Dependencies are inferred from the claim text.