Semiconductor device and method for manufacturing semiconductor device

A semiconductor device comprising:

• a trench provided in an insulating layer, wherein the trench includes a lower end corner portion having a curved shape and an upper end corner portion having a curved shape;
• an oxide semiconductor film in contact with a bottom surface, an inner wall surface, the lower end corner portion, and the upper end corner portion of the trench;
• a source electrode layer and a drain electrode layer over the oxide semiconductor film;
• a gate insulating layer over the oxide semiconductor film, the source electrode layer, and the drain electrode layer;
• and
• a gate electrode layer over the gate insulating layer,
• wherein the upper end corner portion has a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm,
• wherein the lower end corner portion has a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm.

A semiconductor device comprising:

• a first transistor comprising:
• a channel formation region including a semiconductor material;
• and
• a first gate electrode overlapping with the channel formation region,
• an insulating layer covering the first transistor, wherein part of the first gate electrode is exposed without being covered with the insulating layer,
• a second transistor comprising:
• a trench provided in the insulating layer, wherein the trench includes an upper end corner portion having a curved shape;
• an oxide semiconductor film in contact with a bottom surface, a lower end corner portion, the upper end corner portion and an inner wall surface of the trench;
• a source electrode layer and a drain electrode layer in contact with the oxide semiconductor film;
• a gate insulating layer over the oxide semiconductor film, the source electrode layer, and the drain electrode layer;
• and
• a second gate electrode layer over the gate insulating layer,
• wherein the upper end corner portion has a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm, and
• wherein one of the source electrode layer and the drain electrode layer of the second transistor is in direct contact with the part of the first gate electrode.

A method for manufacturing a semiconductor device, comprising the steps of:

• forming an insulating layer provided with a trench including a lower end corner portion and an upper end corner portion;
• processing the upper end corner portion into a curved shape with a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm;
• forming an oxide semiconductor film in contact with a bottom surface, an inner wall surface, the lower end corner portion, and the upper end corner portion of the trench;
• forming a gate insulating layer over the oxide semiconductor film;
• and
• forming a gate electrode layer over the gate insulating layer.

A method for manufacturing a semiconductor device, comprising the steps of:

• forming an insulating layer provided with a trench including a lower end corner portion and an upper end corner portion;
• processing the upper end corner portion into a curved shape with a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm;
• forming an oxide semiconductor film in contact with a bottom surface, an inner wall surface, the lower end corner portion, and the upper end corner portion of the trench;
• forming a gate insulating layer over the oxide semiconductor film;
• and
• forming a gate electrode layer over the gate insulating layer,
• wherein the oxide semiconductor film is formed while heating the insulating layer so as to include a crystal having a c-axis substantially perpendicular to a surface at least over the upper end corner portion.

A method for manufacturing a semiconductor device, comprising the steps of:

• forming an insulating layer provided with a trench including a lower end corner portion and an upper end corner portion;
• processing the upper end corner portion into a curved shape with a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm;
• forming an amorphous oxide semiconductor film in contact with a bottom surface, an inner wall surface, the lower end corner portion, and the upper end corner portion of the trench;
• performing heat treatment on the amorphous oxide semiconductor film to form an oxide semiconductor film including a crystal having a c-axis substantially perpendicular to a surface at least over the upper end corner portion;
• forming a gate insulating layer over the oxide semiconductor film;
• and
• forming a gate electrode layer over the gate insulating layer.