Dummy data padding and error code correcting memory controller, data processing method thereof, and memory system including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsWoo Tae Chang, Yong Tae Yim
Life of this patent
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Abstract
A data processing method of a memory controller includes receiving first partial data of a last sector data among a plurality of sector data to be stored in an n-th page of a non-volatile memory in a program operation; padding the first partial data with first dummy data and generating a first error correction code (ECC) parity in the program operation; and transferring the first partial data and the first ECC parity to the non-volatile memory in the program operation, while refraining from transferring the first dummy data to the non-volatile memory. Related devices and systems are also described.
Claims20
A data processing method of a memory controller, the data processing method comprising:
- receiving first partial data of last sector data among a plurality of sector data to be stored in an n-th page of a non-volatile memory in a program operation;
- padding the first partial data with first dummy data and generating a first error correction code (EEC) parity in the program operation;
- and
- transferring the first partial data and the first ECC parity to the non-volatile memory, while refraining from transferring the first dummy data to the non-volatile memory, in the program operation.
A memory controller comprising:
- a buffer manager configured to manage data including first partial data of at least one sector data;
- an error correction code (ECC) engine configured to pad the first partial data with first dummy data and generate a first ECC parity;
- and
- a flash manager configured to be connected between the buffer manager and the ECC engine and configured to transmit the first partial data and the first parity to a flash memory, while refraining from transmitting the first dummy data to the flash memory, according to a command of a host.
A flash memory device which performs data input/output in units of sectors, the flash memory device comprising an n-th page which stores at least one partial data and at least one error correction code (ECC) parity for the at least one partial data, wherein the at least one partial data is smaller than each sector.
Dependencies are inferred from the claim text.