Conditional alu instruction pre-shift-generated carry flag propagation between microinstructions in read-port limited register file microprocessor

A method for a microprocessor, having architectural condition flags that include an architectural carry flag and other architectural condition flags, to perform an architectural instruction that instructs the microprocessor to perform a shift operation on a first source operand to generate a first result, to perform a second operation on the first result and a second operand to generate a second result, and to write the second result to a destination register and update the condition flags only if the architectural condition flags satisfy a condition specified in the architectural instruction, the method comprising:

• translating the architectural instruction into first and second microinstructions, wherein said translating is performed by a hardware instruction translator of the microprocessor;
• and
• executing the first and second microinstructions received from the hardware instruction translator, wherein said executing is performed by an execution pipeline of the microprocessor;
• wherein said executing the first microinstruction comprises:
• performing the shift operation on the first source operand to generate the first result and a carry flag value;
• and
• updating a non-architectural carry flag with the generated carry flag value;
• wherein said executing the second microinstruction comprises:
• performing the second operation on the first result and the second operand to generate the second result and new condition flag values based on the second result;
• if the architectural condition flags satisfy the condition, updating the architectural carry flag with the non-architectural carry flag value and updating at least one of the other architectural condition flags with the corresponding generated new condition flag values;
• and
• if the architectural condition flags do not satisfy the condition, updating the architectural condition flags with the current value of the architectural condition flags.

A computer program product encoded in at least one computer readable storage medium for use with a computing device, the computer program product comprising:

• computer readable program code embodied in said medium, for specifying a microprocessor having architectural condition flags that include an architectural carry flag and other architectural condition flags, wherein the microprocessor performs an architectural instruction that instructs the microprocessor to perform a shift operation on a first source operand to generate a first result, to perform a second operation on the first result and a second operand to generate a second result, and to write the second result to a destination register and update the condition flags only if the architectural condition flags satisfy a condition specified in the architectural instruction, the computer readable program code comprising:
• first program code for specifying a register, that includes storage for the architectural condition flags and includes storage for a non-architectural carry flag;
• second program code for specifying a hardware instruction translator, that receives the architectural instruction and responsively translates the architectural instruction into first and second microinstructions;
• and
• third program code for specifying an execution pipeline, that executes the microinstructions received from the hardware instruction translator;
• wherein in response to the first microinstruction, the execution pipeline:
• performs the shift operation on the first source operand to generate the first result and a carry flag value;
• and
• updates the non-architectural carry flag with the generated carry flag value;
• wherein in response to the second microinstruction, the execution pipeline:
• performs the second operation on the first result and the second operand to generate the second result and new condition flag values based on the second result;
• if the architectural condition flags satisfy the condition, updates the architectural carry flag with the non-architectural carry flag value and updates at least one of the other architectural condition flags with the corresponding generated new condition flag values;
• and
• if the architectural condition flags do not satisfy the condition, updates the architectural condition flags with the current value of the architectural condition flags.