Register allocation in rotation based alias protection register
AssigneeIntel Corporation
InventorsCheng Wang, Youfeng Wu
Life of this patent
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Abstract
A system may comprises an optimizer/scheduler to schedule on a set of instructions, compute a data dependence, a checking constraint and/or an anti-checking constraint for the set of scheduled instructions, and allocate alias registers for the set of scheduled instructions based on the data dependence, the checking constraint and/or the anti-checking constraint. In one embodiment, the optimizer is to release unused registers to reduce the alias registers used to protect the scheduled instructions. The optimizer is further to insert a dummy instruction after a fused instruction to break cycles in the checking and anti-checking constraints.
Claims18
A method, comprising:
- performing a schedule on a set of instructions;
- computing a data dependence for the set of scheduled instructions;
- computing a checking constraint for the set of scheduled instructions;
- and
- allocating alias registers for the set of scheduled instructions based on the data dependence and the checking constraint.
A system, comprising:
- a processor;
- and
- an optimizer to optimize a set of original codes to be executed by the processor, schedule the optimized codes into scheduled codes, and allocating a new alias register to the scheduled codes based on at least one of data dependence and constraint of the scheduled codes.
A machine-readable medium containing instructions which, when executed by a processing system, cause a computing system to
- schedule a set of instructions;
- compute a constraint for the set of scheduled instructions;
- allocate a new alias register to one of scheduled instructions based on the constraint.
Dependencies are inferred from the claim text.