Reducing energy consumption in wireless devices
AssigneeThe Regents of the University of Michigan
InventorsKang G. Shin, Xinyu Zhang
Life of this patent
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Abstract
Techniques are provided for reducing power consumption in wireless communication devices. During an idle listening period, the clock rate of the receiver in the device is reduced. Data packets received by the receiver are then sampled at the reduced clock rate. A determination is made as to whether the data packet is intended for the device. The clock rate is restored to the full clock rate when the data packet is intended for the device. On the other hand, the receiver continues to operate at the reduced clock rate when the data packet is not intended for the device.
Claims24
A method for reducing power consumption of a wireless communication device, comprising:
- reducing, by a receiver in the device, clock rate of a clock during an idle listening period of the device, the reduced clock rate being less than a full clock rate and the clock operating a receiver of the device;
- detecting, by the receiver, a preamble of a data packet at the reduced clock rate, the data packet received by the receiver during the idle listening period;
- determining, by the receiver, whether the data packet is intended for the device, the determination being based on the preamble of the data packet;
- and
- restoring, by the receiver, clock rate of the clock to the full clock rate when the data packet is intended for the device.
A method for reducing power consumption of a wireless communication device, comprising:
- reducing, by a receiver in the device, clock rate of a clock during an idle listening period of the device, the reduced clock rate being less than a full clock rate and the clock operating a receiver of the device;
- sampling, by the receiver, data of a data packet at the reduced clock rate, the data packet received by the receiver during the idle listening period;
- determining, by the receiver, a correlation between data in a preamble of the data packet, where the preamble is comprised of a random sequence of data bits duplicated two or more times and separation between the random sequences is indicative of an address of the device;
- restoring, by the receiver, clock rate of the clock to the full clock rate when correlation between data bits exceeds a threshold;
- and
- continuing to operate the clock at the reduced clock rate when correlation between data bits does not exceed the threshold.
A receiver for a wireless communication device, comprising:
- a clock circuit operable to generate a clock signal at one of a full clock rate and a reduced clock rate, where the reduced clock rate is less than the full clock rate;
- a downclocking module interfaced with the clock generator and operable to set the clock signal to the reduced clock rate during an idle listening period;
- and
- a decoder configured to receive and decode data bits of a data packet, wherein the decoder operates in accordance with the clock signal received from the clock generator.
Dependencies are inferred from the claim text.