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US 2012/0256277 A1Published application
Semiconductor device exhibiting reduced parasitics and method for making same
AssigneeGlobalfoundries Inc.
InventorsBruce B. Doris, Kangguo Cheng, Keith Kwong Hon Wong
Life of this patent
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Abstract
A semiconductor device includes a substrate and a gate stack disposed on the substrate. An upper layer of the gate stack is a metal gate conductor and a lower layer of the gate stack is a gate dielectric. A gate contact is in direct contact with the metal gate conductor.
Claims25
A semiconductor device comprising:
- a substrate;
- a gate stack disposed on the substrate, an upper layer of the gate stack being a metal gate conductor and a lower layer of the gate stack being a gate dielectric;
- and
- a gate contact in direct contact with the metal gate conductor.
1 more element
A method of forming a semiconductor device, the method comprising:
- providing a substrate having a gate stack formed thereon, an upper layer of the gate stack being a metal gate conductor and a lower layer of the gate stack being a gate dielectric;
- depositing a stress liner overlying the substrate and the gate stack;
- and
- forming a gate contact, wherein the gate contact is in direct contact with the metal gate conductor.
1 more element
A method of forming a semiconductor device, the method comprising:
- forming a gate spacer on a substrate;
- depositing a gate stack on the substrate and within the gate spacer, an upper layer of the gate stack being a metal gate conductor and a lower layer of the gate stack being a gate dielectric;
- forming a gate contact, wherein the gate contact is in direct contact with the metal gate conductor.
Dependencies are inferred from the claim text.