US 2012/0256248 A1Published application

Structure and fabrication method of tunnel field effect transistor with increased drive current and reduced gate induced drain leakage (gidl)

AssigneeInternational Business Machines Corporation

InventorsMohit Bajaj, Kota V.R.M. Murali, Edward J. Nowak, Rajan K. Pandey

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Abstract

Gate induced drain leakage in a tunnel field effect transistor is reduced while drive current is increased by orienting adjacent semiconductor bodies, based on their respective crystal orientations or axes, to optimize band-to-band tunneling at junctions. Maximizing band-to-band tunneling at a source-channel junction increases drive current, while minimizing band-to-band tunneling at a channel-drain junction decreases GIDL. GIDL can be reduced by an order of magnitude in an embodiment. Power consumption for a given frequency can also be reduced by an order of magnitude.

Claims20

Dependent claims

A tunnel field effect transistor comprising:

a source region, a channel region, a gate region, and a drain region, the channel region being connected to the source region and the drain region;
a first semiconductor body of one of the source region, the channel region, and the drain region, the first semiconductor body having a first semiconductor material crystal axis;
and
a second semiconductor body of another of the source region, the channel region, and the drain region, the second semiconductor body having a second semiconductor material crystal axis;
and
a first transition region including at least a first junction that is a respective one of a source-channel junction and a channel-drain junction, the first semiconductor body and the second semiconductor body being arranged such that the first semiconductor material crystal axis is oriented at a first predetermined angle relative to the second semiconductor material axis to optimize band-to-band tunneling during operation of the tunnel field effect transistor.

3 more elements

A method of fabricating a tunnel field effect transistor on a semiconductor substrate, the method comprising:

providing a semiconductor substrate;
defining a device region;
forming a channel semiconductor body in the device region with a source-end portion, a drain-end portion, and at least one gate surface;
and
forming one of a source region and a drain region, thereby forming a junction, including forming a channel-end portion adjacent a respective channel end portion, the channel-end portion of the one of a source region and a drain region having a first semiconductor material crystal axis, the respective channel end portion having a second semiconductor material crystal axis oriented at a first predetermined angle relative to the first semiconductor material crystal axis so as to optimize band-to-band tunneling at the junction during operation of the tunnel field effect transistor.

2 more elements

A method of making a tunnel field effect transistor comprising:

providing a substrate having a work surface;
forming a fin on the work surface;
forming a source region of the fin, the source region having a channel-end portion with a first semiconductor material crystal axis;
forming a channel region of the fin adjacent the source region, thereby forming a source-channel junction between the source region and the channel region, a source-end portion of the channel region having a second semiconductor material crystal axis that is oriented at a first predetermined angle relative to the first semiconductor material crystal axis, the first predetermined angle being determined to maximize band-to-band tunneling of the source-channel junction during operation of the tunnel field effect transistor;
depositing a tunnel dielectric on at least a portion of the source region of the fin;
depositing a channel dielectric on at least a portion of the channel region of the fin;
and
forming a gate region by depositing gate material on the tunnel and channel dielectrics.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/082,867Filed 8 Apr 2011
Published: 11 Oct 2012
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H10D 12/211
Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]: gated diodes
H10D 12/021
Manufacture or treatment: of gated diodes, e.g. field-controlled diodes [FCD]
H10D 62/117
Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies: shapes of semiconductor bodies
H10D 62/405
Crystalline structures: orientations of crystalline planes