Semiconductor integrated circuit device

A semiconductor integrated circuit device which includes a standard logic cell,

• wherein the standard logic cell comprising:
• a plurality of circuit elements which are formed on a semiconductor substrate;
• first and second power wirings which are respectively formed on an upper layer of the semiconductor substrate, which are separated from each other in a cell height direction and extend in a cell width direction which is perpendicular to the cell height direction in a planar view, and which supply a first reference voltage;
• a third power wiring which is formed on the upper layer of the semiconductor substrate, which extends in the cell width direction between the first and second power wirings in the planar view, and which supplies a second reference voltage which is different from the first reference voltage;
• a plurality of first signal wirings which are respectively formed on the upper layer of the semiconductor substrate, which are separated from the first, second, and third power wirings in the planar view, and which are electrically connected to at least one of the plurality of circuit elements;
• and
• at least one of a plurality second signal wiring which is formed on an upper layer of the plurality of first signal wirings, which extends in the cell width direction in the planar view, and which is electrically connected to at least one of the plurality of circuit elements and the plurality of first signal wirings.