Memory controller, information processing apparatus and method of controlling memory controller

An information processing apparatus including a memory module having an ECC (Error Check and Correction) function and a memory controller which is connected to the memory module and which controls access to the memory module, the information processing apparatus, comprising:

• an error detection unit configured to detect an error bit and a position of the error bit by reading, from the memory module, information on codes of the ECCs corresponding to a plurality of read data read from the memory module;
• a buffer configured to temporarily store the plurality of read data;
• and
• a determination unit configured to determine, when the plurality of read data stored in the buffer include a number of data in which a correctable error is detected by the error detection unit and error detection positions of the detected data are the same as each other, that a correctable error is included in a group of the plurality of read data.

A method of controlling a memory controller which is connected to a memory module having an ECC (Error Check and Correction) function and which controls access to the memory module, the method comprising:

• detecting an error block including a plurality of error bits and a position of the error block by reading, from the memory module, information on codes of the ECCs corresponding to a plurality of read data read out from the memory module;
• storing the plurality of read data;
• and
• determining, when the plurality of read data stored in the buffer include a number of data in which a correctable error is detected by the detecting and error detection positions of the detected data are the same as each other, that a correctable error is included in a group of the plurality of read data.