Virtual address pager and method for use with a bulk erase memory
AssigneeThe Trustees of Princeton University
InventorsAnirudh Badam, Vivek Pai
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AssigneeThe Trustees of Princeton University
InventorsAnirudh Badam, Vivek Pai
Estimating the term…
A virtual address pager and method for use with a bulk erase memory is disclosed. The virtual address pager includes a page protection controller configured with a heap manager interface configured to receive only bulk erase memory-backed page requests for a plurality of memory pages. A RAM object cache controller is configured to store and bulk write data for a portion of the bulk erase memory. The page protection controller may have an operating system interface configured to generate a page memory access permission for each of the plurality of memory pages. The page protection controller may be configured to receive a virtual memory allocation request and generate the page memory access permission based on the virtual memory allocation request.
A virtual address pager for use with a bulk erase memory comprising:
A method of virtual address paging for use with a bulk erase memory, the method comprising:
A computer readable medium having stored thereon a computer program for execution by a processor configured to perform a method of virtual address paging for use with a bulk erase memory, the method comprising:
Dependencies are inferred from the claim text.