Apparatus and method for determining an operating condition of a memory cell based on cycle information
AssigneeSTEC, Inc.
InventorAshot MELIK-MARTIROSIAN
Life of this patent
Estimating the term…
Abstract
Disclosed is an apparatus and method for determining a parameter for programming a non-volatile memory circuit. On receiving write or erase operation a parameter is determined as a function of a circuit characteristic associated with a memory block. An adjusted condition, for example, read or write time, or the standard deviation of voltage thresholds in a distribution of cells, is then determined as a function of the parameter, and a command provided to the memory circuit to use the parameter in the next write or erase operation performed on the memory block. The method can be triggered by an event such as P/E cycle times and the condition is dynamically adjusted to extend the life of the memory circuit.
Claims25
A method for adjusting an operating condition in a memory block of a non-volatile memory circuit, comprising:
- storing a parameter, the operating condition being a function of the parameter;
- monitoring a memory operation for a trigger event;
- and
- on the trigger event, adjusting the parameter in accordance with a circuit characteristic associated with the memory block, and
- providing to the memory circuit a command representative of an instruction to apply a series of voltage pulses to a group of cells in the memory block in accordance with the parameter to adjust the operating condition.
A control circuit for adjusting an operating condition in a memory block of a non-volatile memory circuit, comprising:
- a memory interface configured to be operably coupled to the memory circuit;
- and
- a controller, wherein the controller is configured to:
- store a parameter, the operating condition being a function of the parameter,
- monitor a memory operation for a trigger event, and,
- on the trigger event, adjust the parameter in accordance with a circuit characteristic associated with the memory block, and
- provide to the memory interface a command representative of an instruction to apply a series of voltage pulses to a group of cells in the memory block in accordance with the parameter to adjust the operating condition.
A system for adjusting an operating condition in a memory block of a non-volatile memory circuit, comprising:
- a host interface configured to be operably coupled to a host device, to receive data from the host device, and to send data to the host device;
- a memory interface operably coupled to the memory circuit;
- a storage medium interface operably coupled to a volatile memory;
- and
- a controller operably coupled to the host interface, wherein the controller is operable to:
- store a parameter in the volatile memory, the operating condition being a function of the parameter,
- monitor a memory operation for a trigger event, and,
- on the trigger event, adjust the parameter in accordance with a circuit characteristic associated with the memory block, and
- provide to the memory circuit a command representative of an instruction to apply a series of voltage pulses to a group of cells in the memory block in accordance with the parameter to adjust the operating condition.
A method for populating a parameter set for dynamically adjusting an operating condition in a memory block of a non-volatile memory circuit, comprising:
- identifying a desired condition limit;
- computing a first parameter as a function of a first memory operation to be performed on the memory block, the operating condition being a function of the parameter;
- including the first parameter in the parameter set;
- cycling the memory block until the operating condition reaches the desired condition limit;
- determining after the cycling a second parameter as a function of a second memory operation to be performed on the memory block;
- including the second parameter in the parameter set;
- repeating the cycling and the determining and the including the second parameter steps until a desired number of cycles is reached;
- performing a retention bake on the memory circuit;
- performing a read operation on the memory block;
- and
- verifying a bit error rate resulting from the read operation does not exceed a desired error rate.
Dependencies are inferred from the claim text.