Methods of Fabricating Semiconductor Devices Having Gate Trenches

A method of fabricating a semiconductor device, the method comprising:

• providing a substrate having a channel region defined therein;
• forming a dummy gate pattern on the substrate on the channel region;
• forming a source region on a first side of the dummy gate pattern and a drain region on a second side of the dummy gate pattern;
• forming an insulation layer on the substrate so as to cover the source region and the drain region;
• forming a gate electrode trench having a sidewall portion, a bottom portion and an edge portion between the sidewall portion and the bottom portion in the insulation layer by removing the dummy gate pattern, the gate electrode trench overlapping the channel region;
• and
• forming a gate electrode in the gate electrode trench,
• wherein forming a gate electrode comprises forming a first metal layer pattern in the gate electrode trench, forming a second metal layer pattern on the first metal layer pattern and forming a third metal layer pattern on the second metal layer pattern.

A method of fabricating a semiconductor device, the method comprising:

• providing a substrate having a channel region defined therein;
• forming a dummy gate pattern on the substrate on the channel region;
• forming a source region on a first side of the dummy gate pattern and a drain region on a second side of the dummy gate pattern;
• forming an insulation layer on the substrate so as to cover the source and drain regions;
• forming a gate electrode trench having a sidewall portion, a bottom portion and an edge portion between the sidewall portion and the bottom portion on the insulation layer by removing the dummy gate pattern, the gate electrode trench overlapping the channel region;
• and
• forming a gate electrode in the gate electrode trench,
• wherein forming the gate electrode comprises forming a first metal layer pattern in the gate electrode trench by one of physical vapor deposition (PVD), chemical vapor deposition (CVD) and atomic layer deposition (ALD), and forming a second metal layer pattern on the first metal layer pattern using one of PVD, CVD and ALD.