Hierarchical common source line structure in nand flash memory
AssigneeMosaid Technologies Incorporated
InventorsHong-Beom PYEON, Jin-Ki Kim
Life of this patent
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Abstract
Each memory cell string in a generic NAND flash cell block connects to a Common Source Line (CLS). A value for applying to the CSL is centrally generated and distributed to a local switch logic unit corresponding to each NAND flash cell block. For source-line page programming, the distribution line may be called a Global Common Source Line (GCSL). In an array of NAND flash cell blocks, only one NAND flash cell block is selected at a time for programming. To reduce power consumption, only the selected NAND flash cell block receives a value on the CSL that is indicative of the value on the GCSL. Additionally, the CSLs of non-selected NAND flash cell blocks may be disabled through an active connection to ground.
Claims11
A memory system including a NAND Flash memory device, the device comprising:
- a cell block including a plurality NAND flash memory strings connected to a local common source line, and
- a local switch logic including:
- a first semiconductor switch for selectively allowing passage of a signal received on a global common source line to the cell block on the local common source line;
- and
- a second semiconductor switch for selectively allowing passage of a predetermined voltage on the local common source line.
Dependencies are inferred from the claim text.