Asymmetric log-likelihood ratio for mlc flash channel
AssigneeSTEC, Inc. A California Corporation
InventorXinde HU
Life of this patent
Estimating the term…
Abstract
Disclosed is an system and method for reading a flash memory cell with an adjusted read level. A current read level is adjusted to a new read level associated with increasing a first error rate to decrease a second error rate. The first error rate is associated with determining that the most significant bit of the flash memory cell is a binary 1 and the second error rate is associated with determining that the most significant bit is a binary 0. On reading the memory cell, a probability value is generated for the most significant bit, the probability being higher if the bit is equivalent to a binary 0 than if the bit is equivalent to a binary 1.
Claims24
A computer-implemented method of reading a flash memory with an adjusted read level, the method comprising:
- identifying a current read level associated with determining a most significant bit in a plurality of multi-level memory cells;
- setting the current read level to a new read level associated with increasing a first error rate, the first error rate associated with determining that the most significant bit is a first binary value, to decrease a second error rate associated with determining that the most significant bit is a second binary value;
- reading a memory cell with the new read level to determine a most significant bit value of the memory cell;
- determining a probability value associated with the most significant bit value;
- and
- providing the most significant bit value and the probability value to a decoder.
A machine-readable medium having instructions that, when executed, perform a method of reading a flash memory with an adjusted read level, the method comprising:
- identifying a current read level associated with determining between cell distributions in a plurality of multi-level memory cells;
- setting the current read level to a new read level associated with increasing a chance of error of determining cells in a first cell distribution, to decrease a chance of error of determining cells in a second cell distribution;
- performing a page operation to determine a group of cells at the first or second distribution;
- determining probability values corresponding to the group of cells;
- and
- providing the group of cells and the probability values to a decoder.
A system, comprising:
- a memory, the memory having stored thereon a plurality of programming levels and corresponding unique level distributions;
- a memory interface configured to be operably coupled to the memory;
- a decoder;
- and
- a page operation unit operably coupled to the memory interface and the decoder, wherein the page operation unit is configured to:
- identify the current read level associated with determining a most significant bit in a plurality of multi-level memory cells;
- set the current read level to a new read level associated with increasing a first error rate, the first error rate associated with determining that the most significant bit is a first binary value, to decrease a second error rate associated with determining that the most significant bit is a second binary value;
- read a memory cell with the new read level to determine a most significant bit value of the memory cell;
- determine a probability value associated with the most significant bit value;
- and
- provide the most significant bit value and the probability value to a decoder.
Dependencies are inferred from the claim text.