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US 2012/0236221 A1Published application
Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorHajime Kimura
Life of this patent
Estimating the term…
Abstract
Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).
Claims23
A semiconductor device comprising:
- first, second, third and fourth transistors and a capacitor;
- wherein the first, second, third and fourth transistors are the same conductivity type,
- wherein a first electrode of the capacitor is electrically directly connected to a gate of the first transistor,
- wherein a gate of the second transistor is electrically directly connected to a first signal input terminal,
- wherein one of source and drain of the first transistor and one of source and drain of the third transistor are electrically directly connected to a signal output terminal,
- wherein one of source and drain of the second transistor is electrically connected to a first power supply line, and the other of source and drain of the second transistor is electrically directly connected to the signal output terminal,
- wherein the other of source and drain of the third transistor is directly connected to the first electrode of the capacitor,
- wherein one of source and drain of the fourth transistor is electrically directly connected to the first electrode of the capacitor,
- wherein the other of source and drain of the fourth transistor is electrically directly connected to a second signal input terminal, and
- wherein a second electrode of the capacitor is electrically connected to the second signal input terminal.
7 more elements
A display device comprising:
- a pixel portion comprising a fifth transistor over a substrate;
- a driver circuit over the substrate, and comprising first, second, third and fourth transistors and a capacitor;
- wherein the first, second, third and fourth transistors are the same conductivity type,
- wherein a first electrode of the capacitor is electrically directly connected to a gate of the first transistor,
- wherein a gate of the second transistor is electrically directly connected to a first signal input terminal,
- wherein one of source and drain of the first transistor and one of source and drain of the third transistor are electrically directly connected to a signal output terminal,
- wherein one of source and drain of the second transistor is electrically connected to a first power supply line, and the other of source and drain of the second transistor is electrically directly connected to the signal output terminal,
- wherein the other of source and drain of the third transistor is directly connected to the first electrode of the capacitor,
- wherein one of source and drain of the fourth transistor is electrically directly connected to the first electrode of the capacitor,
- wherein the other of source and drain of the fourth transistor is electrically directly connected to a second signal input terminal, and
- wherein a second electrode of the capacitor is electrically connected to the second signal input terminal.
8 more elements
A liquid crystal display device comprising:
- a pixel portion comprising a fifth transistor and a liquid crystal over a substrate;
- a driver circuit over the substrate, and comprising first, second, third and fourth transistors and a capacitor;
- wherein the first, second, third and fourth transistors are the same conductivity type,
- wherein a first electrode of the capacitor is electrically directly connected to a gate of the first transistor,
- wherein a gate of the second transistor is electrically directly connected to a first signal input terminal,
- wherein one of source and drain of the first transistor and one of source and drain of the third transistor are electrically directly connected to a signal output terminal,
- wherein one of source and drain of the second transistor is electrically connected to a first power supply line, and the other of source and drain of the second transistor is electrically directly connected to the signal output terminal,
- wherein the other of source and drain of the third transistor is directly connected to the first electrode of the capacitor,
- wherein one of source and drain of the fourth transistor is electrically directly connected to the first electrode of the capacitor,
- wherein the other of source and drain of the fourth transistor is electrically directly connected to a second signal input terminal, and
- wherein a second electrode of the capacitor is electrically connected to the second signal input terminal.
8 more elements
Dependencies are inferred from the claim text.