Adaptive bandwidth phase-locked loop
AssigneeFreescale Semiconductor, Inc.
InventorsKrishna THAKUR, Deependra K. JAIN, Vinod K. JAIN
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AssigneeFreescale Semiconductor, Inc.
InventorsKrishna THAKUR, Deependra K. JAIN, Vinod K. JAIN
Estimating the term…
A phase-locked loop (PLL) generates an oscillator signal based on an input reference signal. A voltage-to-current converter converts a control voltage to a first current. A current-controlled oscillator generates the oscillator signal based on the first current. A dual charge pump circuit generates first and second charge pump currents having a predetermined ratio, based on a second current generated by a current mirror circuit and an error (feedback) signal. An active loop filter generates the control voltage based on the first and second charge pump currents. The active loop filter includes an input capacitance that varies with a variation in the predetermined ratio of the charge pump currents. The active loop filter also includes a transconductance stage having a transconductance that varies based on a third current generated by a current mirror circuit. The PLL bandwidth is independent of PVT variations and dependent only on the frequency of the input reference signal. In addition, the size of the input capacitor is relatively small so that the circuit requires very little space.
A phase-locked loop (PLL), comprising:
A system for generating an oscillator signal, the system comprising:
Dependencies are inferred from the claim text.