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US 2012/0235710 A1Published application
Circuit Arrangement with a MOSFET and an IGBT
AssigneeInfineon Technologies AG
InventorsWerner Roessler, Gerald Deboy
Life of this patent
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Abstract
A circuit includes at least one FET and at least one IGBT that have their load paths connected in parallel. A voltage limiting circuit is coupled to a gate terminal of the at least one IGBT.
Claims15
A circuit, comprising:
- an input terminal and an output terminal;
- at least one FET having a gate terminal and a drain-source path, the drain-source path coupled between the input terminal and the output terminal;
- at least one IGBT having a gate terminal and a collector-emitter path, the collector-emitter path coupled between the input terminal and the output terminal;
- a voltage limiting circuit coupled to the gate terminal of the at least one IGBT and configured to drive the at least one IGBT in an on-state when a voltage across the collector-emitter path reaches a threshold voltage;
- and
- a control circuit having a first drive output coupled to the gate terminal of the at least one FET.
3 more elements
Dependencies are inferred from the claim text.