US 2012/0235708 A1Published application

Method and System for High Speed Differential Synchronous Sense Amplifier

OwnerMark Slamowitzinventor

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Abstract

A sense amplifier may be operable to form a current-mirror reference using a first PMOS transistor and a NMOS transistor. Currents at a first internal terminal and a second internal terminal may be generated based on the current-mirror reference. Voltage signals at the first internal terminal and the second internal terminal may be generated based on received differential input signals and the currents at the first internal terminal and the second internal terminal. The sense amplifier may limit voltage excursions of the voltage signals at the first internal terminal and/or of the second internal terminal using a pair of cross coupled PMOS transistors, respectively. Voltage signals at a third internal terminal and a fourth internal terminal may be generated based on voltage signals at the first internal terminal and the second internal terminal. An output signal may be generated based on the voltage signal at the fourth internal terminal.

Claims20

Dependent claims

A method for sense amplifier circuitry, the method comprising:

in a sense amplifier comprising a first internal terminal, a second internal terminal, a third internal terminal, a fourth internal terminal, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor and a NMOS transistor:
when said sense amplifier is turned on and receives differential input signals at a pair of differential input terminals, forming a first current-mirror reference using said first PMOS transistor and said NMOS transistor;
generating a current at said first internal terminal and a current at said second internal terminal based on said first current-mirror reference;
generating a voltage signal at said first internal terminal and a voltage signal at said second internal terminal based on said received differential input signals, said current at said first internal terminal and said current at said second internal terminal;
and
limiting voltage excursions of said voltage signal at said first internal terminal and/or of said voltage signal at said second internal terminal using said second PMOS transistor and said third PMOS transistor, respectively, wherein said second PMOS transistor and said third PMOS transistor are cross coupled.

3 more elements

A system for sense amplifier circuitry, the system comprising:

one or more circuits for use in a sense amplifier, said one or more circuits comprising a first internal terminal, a second internal terminal, a third internal terminal, a fourth internal terminal, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor and a NMOS transistor, and said one or more circuits being operable to:
when said sense amplifier is turned on and receives differential input signals at a pair of differential input terminals, form a first current-mirror reference using said first PMOS transistor and said NMOS transistor;
generate a current at said first internal terminal and a current at said second internal terminal based on said first current-mirror reference;
generate a voltage signal at said first internal terminal and a voltage signal at said second internal terminal based on said received differential input signals, said current at said first internal terminal and said current at said second internal terminal;
and
limit voltage excursions of said voltage signal at said first internal terminal and/or of said voltage signal at said second internal terminal using said second PMOS transistor and said third PMOS transistor, respectively, wherein said second PMOS transistor and said third PMOS transistor are cross coupled.

3 more elements

Dependencies are inferred from the claim text.