Silicon on insulator structures having high resistivity regions in the handle wafer
AssigneeMEMC Electronic Materials, Inc.
InventorsJeffrey L. Libbert, Lu Fei, Robert W. Standley
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Abstract
Silicon on insulator structures having a high resistivity region in the handle wafer of the silicon on insulator structure are disclosed. Methods for producing such silicon on insulator structures are also provided. Exemplary methods involve creating a non-uniform thermal donor profile and/or modifying the dopant profile of the handle wafer to create a new resistivity profile in the handle wafer. Methods may involve one or more SOI manufacturing steps or electronic device (e.g., RF device) manufacturing steps.
Claims29
A silicon on insulator structure comprising a handle wafer, a silicon device layer, a dielectric layer between the handle wafer and the silicon device layer, the handle wafer forming an interface with the dielectric layer, the handle wafer having an axis, a radius, a back surface, and a peripheral edge extending in the axial direction from the handle-dielectric interface to the back surface, the handle-dielectric interface and back surface being perpendicular to the axis, the handle wafer comprising a surface layer extending in the axial direction from the handle-dielectric interface towards the back surface to a depth, Dsl which comprises a high-resistivity region and a bulk layer extending from the surface layer towards the back surface, the handle wafer having a resistivity profile in which a peak resistivity Rpeak exists in the high-resistivity region, the resistivity generally decreasing from the peak resistivity toward the handle-dielectric interface and from the peak resistivity toward the bulk layer, the peak resistivity occurring at least 0.1 μm from the interface.
A silicon on insulator structure comprising a handle wafer, a silicon device layer, a dielectric layer between the handle wafer and the silicon device layer, the handle wafer forming an interface with the dielectric layer, the handle wafer having an axis, a radius, a back surface, and a peripheral edge extending in the axial direction from the handle-dielectric interface to the back surface, the handle-dielectric interface and back surface being perpendicular to the axis, the handle wafer comprising a surface layer extending in the axial direction from the handle-dielectric interface towards the back surface to a depth, Dsl which comprises a high-resistivity region and a bulk layer extending from the surface layer towards the back surface having an average resistivity Rbulk, the high-resistivity region having a resistivity throughout the high resistivity region that exceeds the resistivity of the bulk Rbulk by at least about 50%, the high resistivity region having a thickness Dres, measured in the axial direction, of at least about 1 μm.
A silicon on insulator structure comprising a handle wafer, a silicon device layer, a dielectric layer between the handle wafer and the silicon device layer, the handle wafer forming an interface with the dielectric layer, the handle wafer having an axis, a radius, a back surface, and a peripheral edge extending in the axial direction from the handle-dielectric interface to the back surface, the handle-dielectric interface and back surface being perpendicular to the axis, a surface layer extending in the axial direction from the handle-dielectric interface towards the back surface to a depth, Dsl, the surface layer having a p-n junction therein, and a bulk layer extending from the surface layer towards the back surface, the handle wafer comprising a dopant of a first type, the dopant of a first type being either a p-type or n-type dopant, the handle wafer comprising a dopant of a second type, the dopant of the second type being either a p-type or n-type dopant and being of a type different than the first type;
- the dopant of a second type having a peak concentration at or near the surface of the handle wafer, the concentration of the dopant of a second type at the front surface exceeding the average concentration of the dopant of the first type in the handle wafer, the concentration of dopant of the second type generally decreasing from the front surface of the handle wafer toward the bulk layer, the concentration of the dopant of the second type being substantially equal to the concentration of the dopant of the first type at a point Pequal in the surface layer, the concentration of the dopant of the second type being less than the concentration of the dopant of the first type from Pequal towards the bulk layer.
A silicon on insulator structure comprising a handle wafer, a silicon device layer, a dielectric layer between the handle wafer and the silicon device layer, the handle wafer forming an interface with the dielectric layer, the handle wafer having an axis, a radius, a back surface, and a peripheral edge extending in the axial direction from the handle-dielectric interface to the back surface, the handle-dielectric interface and back surface being perpendicular to the axis, a surface layer extending in the axial direction from the handle-dielectric interface towards the back surface to a depth, Dsl, and a bulk layer extending from the surface layer towards the back surface, the handle wafer comprising a dopant of a first type, the dopant of a first type being either a p-type or n-type dopant, the handle wafer having an oxygen concentration profile in the surface layer such that the handle wafer is capable of forming a p-n junction in the surface layer upon a subsequent thermal donor generating anneal.
Dependencies are inferred from the claim text.